An Si interposer is an electrical interface made on a Si substrate for high-density die-to-die interconnects. The industry refers to this application as 2.5D integration. TSVs are usually made on the Si interposer to enable vertical interconnects (I/Os) between dies and an organic substrate.
TSV-containing Si interposer
TSMC CoWoS® (Chip-on-Wafer-on-Substrate) technology integrates multiple chips side-by-side onto a interposer containing through-silicon vias (TSVs) by chip-on-wafer bonding process, which is followed by CoW chip assembly onto a substrate (CoW-on-Substrate).
Embedded Multi-die Interconnect Bridge (EMIB)
Embedded Multi-die Interconnect Bridge (EMIB) is an approach developed by Intel to in-package high density interconnect of heterogeneous chips. Instead of using a large Si interposer typically found in other 2.5D approaches, EMIB uses a very small bridge die with multiple routing layers, but without TSVs. This bridge die is embedded as part of Intel's substrate fabrication process.
Embedded Interposer Carrier
Embedded interposer carrier is an 2.5D packaging approach developed by Unimicron. TSV-containing interposer is embeded into an organic substructure and multi-dies are assembled on the interposer.
|Announcement Date||Company||Product||HBM 1&2||Interposer||Packaging Technology|
|Oct 2013||Xilinx||Virtex-7 2000T FPGA||FPGA slices||Si TSV interposer||CoWoS|
|June 2015||AMD||Radeon R9 Fury X GPU (Fiji)||GPU + HBM1||Si TSV interposer||CoWoS|
|June 2015||Altera||Stratix 10 FPGA||FPGA + HBM2||EMIB (No TSVs)||Multi-chips assembly on substrate with embeded EMIB|
|April 2016||Nvidia||Tesla P100 GPU||GPU + HBM2||Si TSV interposer||CoWoS|